Talk:IBM z13

This article is a little ahead of reality, the IBM-Global Foundaries deal has not closed yet. Currently, the East Fishkill fab is still IBM. It will eventually (probably later this year) be Global Foundaries.

z13 in the news for "end-to-end hybrid cloud environments"

http://techcrunch.com/2016/02/15/ibm-launches-new-mainframe-with-focus-on-security-and-hybrid-cloud/?ncid=rss&cps=gravity_1462_9218295925015853593

I know what is meant by "cloud" and "hybrid", not sure about "end-to-end hybrid cloud"..

At least some of the news is I guess wrong with: "include numerous specialized processors", as while that used to be the case, and yes, there are cryptographic instructions, if I recall all (or most) co-processors are gone. They may be "there" (in a way for compatibility, "usual" processors, that can do more, but artificially restricted), as a way of getting you to pay more. comp.arch (talk) 19:53, 16 February 2016 (UTC)

I think that IBM is referring to the feature of the Z/Arch processors to load processors with specialized "firmware" to do a sort of on the fly customization of a processing unit, essentially change the PUs instruction set in software. They've used this to make a PU be specialized for Java, IO, crypto, Linux, memory management, etc. I'll have to do some reading about this new Z13s machine. -- Henriok (talk) 10:36, 18 February 2016 (UTC)

Yes, as I recall, the CPUs can be/or I guess always are specialized, by [IBM provided] "firmware", that is, it's only software, the hardware is the same (unlike in older generations). This is at least in this CPU and maybe some older, but not "Z/Arch". I assume you are not talking about "end-to-end", as that seems a completely separate issue.. comp.arch (talk) 15:40, 18 February 2016 (UTC)

Do they actually change the instruction set in a fashion other than "change the millicode so that the processor can only boot {the Java engine, the crypto engine, Linux, etc.}"? I think, these days, the instructions that don't trap to millicode are fixed in hardware. Guy Harris (talk) 03:28, 17 August 2016 (UTC)

I think "end-to-end hybrid cloud" means "somebody in IBM marketing picked those three words/phrases out of a box and glued them together because they thought it sounded good". :-) Guy Harris (talk) 03:30, 17 August 2016 (UTC)

z-Architecture is not vectors, it is SIMD

i was alerted to z-Architecture from the talk page on VP. https://en.m.wikipedia.org/wiki/Talk:Vector_processor whilst the IBM 370 had true Cray-style vectors, by way of a SETVL-like instruction called VLVCU, the z-Architecture neither has such an instruction nor does it have predicate masking per-element. this makes it pure "Packed SIMD" also known as SIMD Within A Register. there exists instructions that perform Vector-inspired operations but they are part of thec128-bit ALUs. bottom line z-Architecture is more in line with Power ISA with the same style of 128-bit registers. see VP talk page where I do the analysis of the Tech Ref manuals Lkcl (talk) 13:16, 24 July 2025 (UTC) 

There's IBM's term for the z/Architecture feature, "Vector Facility", and there's whether the IBM term is accurate. We should use IBM's term, even if it's inaccurate, but, if it's not what's generally thought of as what a vector processor does, we should use "vector" only in the name of the facility, and should note the difference. Guy Harris (talk) 14:53, 24 July 2025 (UTC)

@Lkcl: Section titles for hardware should match vendor nomenclature. If there is an issue with the vendor nomenclature then it might be appropriate to add text (inline or footnote) with citations describing the issue. -- Shmuel (Seymour J.) Metz Username:Chatul (talk) 09:54, 31 August 2025 (UTC)