Original file (SVG file, nominally 267 × 267 pixels, file size: 808 bytes)

Summary

Description
English: Layout of NMOS and PMOS components in an inverter (NOT gate).
Español: Disposición de componentes NMOS y PMOS en un inversor (Puerta NO).
Date
Source Own work
Author inductiveload
SVG development
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 This circuit diagram uses embedded text.

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Public domain I, the copyright holder of this work, release this work into the public domain. This applies worldwide.
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3b42cd2109c73e52b0ad8970563504b8ec7ffb77

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File history

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Date/TimeThumbnailDimensionsUserComment
current15:38, 31 December 2025Thumbnail for version as of 15:38, 31 December 2025267 × 267 (808 bytes)Pduive23path to text & other optimalisations
14:32, 4 November 2015Thumbnail for version as of 14:32, 4 November 2015250 × 250 (6 KB)Edgar.bonetRemoved an extraneous small dot, simplified the SVG code.
23:55, 10 December 2008Thumbnail for version as of 23:55, 10 December 2008250 × 250 (18 KB)Lyctc~commonswikiReverted to version as of 19:39, 8 August 2007
23:54, 10 December 2008Thumbnail for version as of 23:54, 10 December 2008250 × 250 (2 KB)Lyctc~commonswiki{{Information |Description= Removed dot. |Source= |Date= |Author= |Permission= |other_versions= }}
23:52, 10 December 2008Thumbnail for version as of 23:52, 10 December 2008250 × 250 (2 KB)Lyctc~commonswiki{{Information |Description=Layout of NMOS and PMOS components in an Inverter (NOT Gate) |Source=*Image:_CMOS_Inverter.svg |Date=2008-12-10 23:51 (UTC) |Author=*derivative work: ~~~ *Image:_CMOS_Inverter.svg: inductiveload |Permission=see below
19:39, 8 August 2007Thumbnail for version as of 19:39, 8 August 2007250 × 250 (18 KB)Dicklyonimproved transistor symbols and centering a bit
19:11, 12 July 2006Thumbnail for version as of 19:11, 12 July 2006250 × 250 (16 KB)Inductiveload{{Information |Description=Layout of NMOS and PMOS components in an Inverter (NOT Gate) |Source=Own drawing, Inkscape 0.43 |Date=12/07/06 |Author=inductiveload |Permission=PD |other_versions= }} Category:CMOS

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